OPTIMIZATION AND PERFORMANCE ANALYSIS OF THE 30-BIT FIXED-POINT DIGITAL FORMAT

Abstract

The 32-bit floating-point format (FP32) is standardly used for digital representation of data in computers, providing high quality of digital representation in a very wide dynamic range of data. However, the FP32 format has a very high computational complexity, requiring the use of expensive and powerful hardware, as well as high energy consumption. Hence, the implementation of the FP32 format on devices such as smart sensors, embedded and edge devices that have limited hardware resources becomes very problematic. On the other hand, the fixed-point format has significantly less computational complexity, consumes less power, requires less area on chip and provides faster calculations than the floating-point format, being much more suitable for implementation on devices with limited hardware resources.

The main goal of this paper is to find a fixed-point format that will be a good replacement for the FP32 format, in the sense that it provides the same performance as the FP32 format and at the same time significantly reduces the computational complexity. Therefore, the paper considers the 30-bit fixed-point format, optimizes the value of its parameters and evaluates its performance, using the analogy between the fixed-point digital representation and uniform quantization. As the main result, the paper shows that the 30-bit fixed-point format can achieve a better quality (i.e. higher SQNR) of digital representation for 3.352 dB compared to the FP32 format, saving at the same time 2 bits per each piece of data (which can be a significant saving for a large amount of data) and significantly reducing the complexity of the implementation. Therefore, the proposed 30-bit fixed-point format can be successfully used as a replacement for the FP32 format on devices with limited resources.