Sandra Đošić, Milica Jovanović, Igor Stojanović, Goran Lj. Đorđević

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In this paper, we analyze the faults tolerance capability of hard real-time systems under power consumption constraints. In particular, we are focused on real-time systems in which:1) the fault tolerance is achieved through time redundancy, which is used for re-executing tasks affected by transient faults, and 2) the dynamic voltage scaling used to manage power consumption. We propose a heuristic-based algorithm to find processor frequencies at which each real-time task should be executed so that: 1) the power consumption does not exceed the upper power limit; 2) the fault tolerance capability is maximized, and 3) all real-time requirements of individual tasks are met. Evaluations on synthetic task sets show that the proposed algorithm attains target power consumption level with minimum degradation in fault tolerance.


real-time systems, power reduction, fault tolerance

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DOI: http://dx.doi.org/10.22190/FUACR1603227D


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