GUEST EDITORIAL

Abstract

Nanoelectronic devices of various kinds of are essential for VLSI circuits. The struggle to follow Moore’s law is becoming increasingly difficult and complex, requiring multitudinous novel approaches in order to continue decreasing dimensions of the devices which are already firmly established in the nano-world. As an example, the most advanced state of the art VLSI’s (microprocessors) currently can contain more than 50 billion transistors per chip. As far as the actual physical dimensions are concerned, in 2021 the IBM company announced their 2 nm chip.

The efforts behind such achievements are enormous. This special issue on advanced planar nanoelectronics investigates some points of interest related to the physics of such devices, as well as their simulation, thus giving its contribution to the existing trends in this rapidly evolving and constantly expanding field.