Author Details

Sedaghat, Reza, Electrical and Computer Engineering, Ryerson University Toronto, Canada, Canada

  • Vol 27, No 2 (2014) - INVITED PAPERS
    EXECUTION TIME – AREA TRADEOFF IN GAUSING RESIDUAL LOAD DECODER: INTEGRATED EXPLORATION OF CHAINING BASED SCHEDULE AND ALLOCATION IN HLS FOR HARDWARE ACCELERATORS
    Abstract  PDF
  • Vol 27, No 3 (2014) - INVITED PAPERS
    RAPID EXPLORATION OF COST-PERFORMANCE TRADEOFFS USING DOMINANCE EFFECT DURING DESIGN OF HARDWARE ACCELERATORS
    Abstract  PDF