TRANSIENT VOLTAGE SUPPRESSOR BASED ON DIODE-TRIGGERED LOW-VOLTAGE SILICON CONTROLLED RECTIFIER
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C. Ito, K. Banerjee, R.W. Dutton, “Analysis and design of distributed ESD protection circuits for high-speed mixed-signal and RF ICs”, IEEE Trans. Electron Devices, vol.49, pp.1444-1454, 2002.
J.-H. Ko, K.-Y. Kim, J.-S. Jeon, C.-H. Jeon, C.-S. Kim, K.-T.Lee, H.-G. Kim, "System-level ESD on-chip protection for mobile display driver IC", Sympo. of Electrical Overstress/ Electrostatic Discharge, 2011, pp.1-8
A. Jahanzeb, L. Lou, C. Duvvury, C. Torres, S. Morrison, "TLP characterization for testing system level ESD performance", Sympo. Electrical Overstress/Electrostatic Discharge, 2010, pp.1-8
K. Shrier, T. Truong, and J. Felps, "Transmission line pulse test methods, test techniques and characterization of low capacitance voltage suppression device for system level electrostatic discharge compliance", Sympo. Electrical Overstress/Electrostatic Discharge, 2004. pp.1-10
H. Gossner, W. Simbürger, M. Stecher, "System ESD robustness by co-design of on-chip and on-board protection measures", Microelectronics Reliability, 2010. 50(9-11): p.1359–1366
M. Hove, T. O. Sanya, A. J. Snyders, I. R Jandrell and H .C. Ferreira, "The effect of type of transient voltage suppressor on the signal response of a coupling circuit for power line communications", AFRICON, 2011
S. S. Choi, D. H. Cho, K. H. Shim, "Development of transient voltage suppressor device with abrupt junctions embedded by epitaxial growth technology", Electron. Mater. Lett., vol. 5, pp. 59-62, Jun 2009.
R. N. Rountree and C. L. Hutchins, "NMOS protection circuitry," IEEE Trans. Electron Devices, vol. 32, pp. 910-917, 1985.
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ISSN: 0353-3670 (Print)
ISSN: 2217-5997 (Online)
COBISS.SR-ID 12826626